Field of the Invention
The present invention relates to a DC-DC converter which outputs a constant voltage, and more specifically to a technology of preventing overshoot of an output voltage.
Background Art
FIG. 6 is a circuit diagram of a related art DC-DC converter.
The related art DC-DC converter is comprised of a power supply terminal 101, a ground terminal 102, a reference voltage circuit 111 which outputs a reference voltage VREF, a voltage dividing circuit 112 which divides an output voltage VOUT of an output terminal 103, an error amplifier 110 which outputs a voltage VERR indicative of a result of comparison between a divided voltage VFB and the reference voltage VREF, a ramp wave generating circuit 114 which generates a ramp wave VRAMP, a PWM comparator 113 which compares the voltage VERR with the ramp wave VRAMP to output a signal PWM, an output buffer 115, an output transistor 116, and a soft start circuit 119.
The operation of the related art DC-DC converter will be described.
When a voltage VDD is applied to the power supply terminal 101, the error amplifier 110 compares the divided voltage VFB and the reference voltage VREF to output the voltage VERR. The PWM comparator 113 compares the voltage VERR and the ramp wave VRAMP and thereby outputs the signal PWM to the output buffer 115. The output buffer 115 outputs the signal PWM to the output transistor 116 under the control of an output signal of the soft start circuit 119. The soft start circuit 119 has the function of gradually raising an output when the voltage VDD is applied to the power supply terminal 101. Thus, overshoot of the output voltage VOUT of the DC-DC converter is suppressed by causing the output buffer 115 to gradually turn on the output transistor 116.
[Patent Document 1] Japanese Patent Application Laid-Open No. 2011-55692